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PM5395 CRSU™ 4x2488
Quad 2.488 Gbit/s - 2.7Gbit/s SERDES with Performance monitoring
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Features
The CRSU 4x2488 is a single chip Clock Recovery and Synthesis Unit supporting four SONET/SDH links operating at 2488.32 Mbit/s.
- Processes four independent bit-serial 2488.32 Mbit/s STS-48 (STM-16) data streams with on-chip clock and data recovery and clock synthesis.
- Complies with Bellcore GR-253-CORE jitter tolerance, jitter transfer and intrinsic jitter criteria.
- Implements In-band Forward Error Correction (FEC) source and sink function according to ANSI Committee T1, Letter Ballot LB812.
- Implements In-band Forward Error Correction (FEC) line regeneration equipment (LRE) function according to ANSI Committee T1, Letter Ballot LB812.
- Provides performance monitoring of SONET Section, and Line layer entities or SDH Regenerator Section, and Multiplexer Section entities.
- Interfaces with downstream SONET/SDH framer devices over a set of four 4-bit, 622 MHz ports that conforms to the timing and AC characteristics defined in the Optical Internetworking Forum, contribution OIF-SFI4-01.0.
- Supports line loop-back from the line side receive stream to the transmit stream and system side loop-back from the QSFI-4 transmit interface to the QSFI-4 receive stream interface.
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- Supports loop-timing of the transmit stream from the associated receive stream.
- Supports Internal Channel-to-Channel loop Function. Channel 0 can be internally connected to Channel 1, and Channel 2 can be connected to Channel 3.
- Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board test purposes.
- Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring.
- Low power 1.8V CMOS core logic with 3.3V CMOS/TTL compatible digital inputs and digital outputs. PECL inputs and CML outputs are 3.3V compatible.
- Industrial temperature range (-40 ° C to +85 ° C Ambient, 125 ° C Maximum Junction Temperature).
- 580-pin 35 x 35 mm UBGA package.
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SONET SECTION AND LINE/SDH REGENERATOR AND MUX SECTION
- Frames to the SONET/SDH receive stream and inserts the framing bytes (A1, A2) into the transmit stream; unscrambles the received stream and scrambles the transmit stream.
- Calculates and compares the bit interleaved parity (BIP) error detection codes (B1, B2) for the receive stream. Calculates and inserts B1 in the transmit stream. Accumulates near end errors (B1, B2) and far end errors (M1).
- Extracts and filters the automatic protection switch (APS) channel (K1, K2) bytes into internal registers.
- Extracts and filters the synchronization status message (S1) byte into an internal register for the receive stream.
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- Detects loss of signal (LOS), out of frame (OOF), loss of frame (LOF), line remote defect indication (RDI-L), line alarm indication signal (AIS-L), and protection switching byte failure alarms on the receive stream.
- Provides a mechanism to insert automatic line AIS insertion following detection of various received alarms LOS and LOF on to the QSFI-4 system side receive interface.
- Configurable to force Line AIS in the transmit stream.
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SONET / SDH IN-BAND FORWARD ERROR CORRECTION
- Implements In-band Forward Error Correction sink function with a maximum delay of 15µs. Frames to the FEC status indication signal (FSI), and optionally outputs corrected data onto the receive system side interface.
- Counts corrected FEC errors in a set of software readable registers.
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- Implements In-band Forward Error Correction source function with a maximum delay of 15µs. Optionally inserts FEC checksum bytes and FSI into the transmit stream. Line BIP (B2) bytes are compensated for the inserted FEC byte values.
- Support FEC Line Regeneration Equipment function with a maximum delay of 15.36µs by looping the receive stream to the transmit stream after FEC error correction.
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Applications
- Multi-Service Provisioning Platforms (MSPPs)
- SONET/SDH Add-Drop Multiplexers (ADMs)
- Digital Cross-Connects (DXCs)
- Optical Cross-Connects (OXCs)
- Core IP Routers
- Core Multi-Service Switches
- Dense Wavelength Division Multiplexing (DWDM) Equipment
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- Coarse Wavelength Division Multiplexing (CWDM) Equipment
- Compatible with OIF-standard 622 MHz interfaces such as those found in the following PMC-Sierra devices:
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CRSU-4x2488 Quad Clock Recovery and Synthesis Unit for 2488 Mbit/s Short Form Data [57 kB] PMC-2001500 
PM5395 CRSU-4x2488 Device Driver [158 kB] PMC-2012185 
BOUNDARY SCAN DESCRIPTION LANGUAGE (BSDL) FOR THE PM5395 CRSU-4X2488 REVISION B [26 kB] PMC-2021337