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PM5392 S/UNI® 9953 POS
SATURN User Network Interface for 9.953 Gbit/s

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Version Issue Date

Product Brief

PDFS/UNI-9953-POS SATURN User Network Interface for 9.953 Gbit/s Short Form [41 kB] PMC-2010908 1  2001-04-27 

Data Sheet

Locked Document, Log In RequiredPDFS/UNI 9953-POS ASSP Telecom Standard Product Data Sheet [2.55 MB] PMC-2030245 3  2007-01-02 

Application Note

Locked Document, Log In RequiredPDFAttaching Passive Heat Sinks to Organic Flip Chip Packages [142 KB] PMC-2020246 3  2007-05-02 
Locked Document, Log In RequiredPDFKnowledge Base Items for the PM5392 S/UNI-9953-POS [322 kB] PMC-2020350   2005-11-10 
Locked Document, Log In RequiredPDFPL4 Static Alignment Design Considerations [197 kB] PMC-2010476 2  2001-07-27 
Locked Document, Log In RequiredPDFCHESS-II Thermal Management Considerations [529 kB] PMC-2011362 1  2002-07-31 

Errata

Locked Document, Log In RequiredPDFS/UNI 9953-POS Data Sheet Errata for Revision A [857 KB] PMC-2030457 4  2007-07-09 

Software Documentation

Locked Document, Log In RequiredPDFPM5390 S/UNI 9953 and and PM5392 S/UNI 9953-POS Device Driver Manual [980 kB] PMC-2011472 2  2003-04-03 

Software

Locked Document, Log In RequiredPDFPM5390 S/UNI-9953 and PM5392 S/UNI-9953-POS Device Driver [257 kB] PMC-2020554 beta 1.1  2003-03-24 

Sales Collateral

Locked Document, Log In RequiredPDFNotice of Change - All FCBGA Packages to be Standardized to the HDBU Substrate Package Outline [695 KB] PMC-2062178 1  2006-10-19 

BSDL Files

Locked Document, Log In RequiredDOCBSDL File for S/UNI 9953-POS Rev. A [158 kB] PMC-2030377 1  2003-03-18 

Please contact apps@pmc-sierra.com to gain access to the following design support documents for PM5390 (S/UNI-9953) and PM5392 (S/UNI 9953-POS)
Document Number Document Name
PMC-2030176 S/UNI 9953 Datasheet Errata for Revision C
PMC-2030457 S/UNI 9953-POS Data Sheet Errata for Revision A
PMC-2031371 Flowtherm detailed model for PM5390
PMC-2010750 Signal Integrity for PMC-Sierra 3.125/2.488/1.5GBPS Links
PMC-2030374 BSDL File for S/UNI 9953
PMC-2011472 PM5390 S/UNI 9953 and and PM5392 S/UNI 9953-POS Device Driver Manual
PMC-2020554 S/UNI-9953 and PM5392 S/UNI-9953-POS Device Driver
PMC-2011362 Chess-II Thermal Management Considerations
PMC-2011949 S/UNI 9953 Device Quick Start Application Note
PMC-2011381 Quad OC-48 Line Card Reference Design and Schematics
PMC-2011046 Interfacing to SFI-4 on Xenon
The customer support website also gives you access to a number of useful SPI4.2 (PL4) Application Notes

Features

  • Supports framing, scrambling/descrambling and pointer processing for the following:
    • STS-192c (STM-64-64c).
    • 4 x STS-48c (4 x STM-16-16c).
    • STS-192 (STM-64) channelized down to STS-48c (STM-16c).
  • Supports alarm signal insertion/detection, B1/2/3 processing and insertion/termination of SONET Section/Line/Path overhead bytes (or SDH equivalents).
  • Provides ATM and POS payload processing for:
    • STS-192c (STM-64-64c)
    • 4 x STS-48c (4 x STM-16-16c).
    • STS-192 (STM-64) channelized down to STS-48c (STM-16c).

    • INTERFACES

    • Provides SATURN POS-PHY Level 4 16-bit LVDS System-side Interface (clocked at 700 MHz nominal).
    • Directly connects to optics via 16 bit by 622 MHz OIF SFI-4 (OIF99.102) line-side interface.

    POS/ATM

    • Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Recommendation I.432.
    • Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to RFC 2615(1619)/1662 of the PPP Working Group of the Internet Engineering Task Force (IETF).

    GENERAL

    • Provides internal FIFOs (16 KB ingress, 20 KB egress) to accommodate system latencies.
    • Provides line-side and system-side loopbacks for system level diagnostic capability.
    • Provides support for automatic protection switching (APS) via two 16-bit LVDS 777.76 MHz ports.
    • Provides a generic 16-bit microprocessor bus interface for configuration, control and status monitoring.
    • Standard 5 signal P1149.1 JTAG test port. Low power 1.8 V CMOS core logic with 3.3 V CMOS/TTL compatible digital inputs and digital outputs.
    • Industrial temperature range (-40 °C to +85 °C).
    • 1152 pin FCBGA package.

    DEVICE INTERWORKING

    Other PMC-Sierra devices that implement the POS-PHY Level 4 interface include:

    POS-PHY LEVEL 4 INTERFACE

    • Designed to transmit cells, packets, or frames between physical and data-link layer devices.
    • Requires less pins and draws less power than other 10 Gigabit interface options.
    • Compliant with the following standards:
      • Optical Internetworking Forum - System Physical Interface Level 4 Phase II (SPI-4 Phase II).
      • ATM Forum - Frame Based ATM Interface Level 4 (ATMF0161.00).
      • SATURN POS-PHY Level 4, Issue 6, March 2001.

    Applications

    • Edge and Core Routers.
    • Multi-Service (Multi-Protocol) Switches.
    • SONET/SDH add/drop multiplexers and optical cross-connects.
    • WAN and Edge ATM switches.
    • Up-link cards.
    • SONET/SDH ATM/POS test equipment.
    • Emerging DPT, IPT and GFP applications.
     
 
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