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PM4329 HDLIU™ 32
32 Channel Short Haul T1/E1 LIU with SBI and SBI TR Bus
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Symbols/Footprints
Features
GENERAL
- Monolithic device that integrates 32 T1/J1/E1 shorthaul line interface circuits.
- Software selectable between E1 and T1 mode, in groups of 16 links. Links 1-16 and 17-32 can be configured for either T1 or E1 mode.
- Meets or exceeds T1/J1 and E1 shorthaul network access specifications including ANSI T1.102, T1.403, T1.408, AT&T TR 62411, ITUT G.703, G.704 as well as ETSI 300- 011, CTR-4, CTR-12, and CTR-13.
- Provides encoding and decoding of B8ZS, HDB3, and AMI line codes.
- Provides per receiver, clock recovery, and line performance monitoring.
- Provides transmit and receive jitter attenuation.
- Provides support for redundancy.
- Provides a digitally programmable Shorthaul pulse template per
transmitter.
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- Provides a selectable, per channel independent de-jittered T1 or E1 recovered clock for system timing and redundancy.
- Provides PRBS generators and detectors on each tributary for error testing at DS1 and E1 rates as recommended in ITU-T O.151.
- Provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring.
- Provides line and digital loopback modes.
- Supports programmable inband loopback codes.
- Uses line rate system clock.
- Provides an IEEE 1149.1 (JTAG)compliant test access port (TAP) and controller for boundary scan test.
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SYSTEM INTERFACE
Supports the following system interfaces:
- High-density SBI bus interface
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- High-density, low latency, SBI TR bus interface.
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RECEIVE SECTION
- Supports T1/E1 signal reception for distances with up to 20 dB of cable attenuation using PIC 22 gauge cable.
- Performs B8ZS or AMI decoding when processing a bipolar DS-1 signal, and HDB3 or AMI decoding when processing a bipolar E1 signal.
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- Tolerates more than 0.4 UI peak to peak, high frequency jitter as required by AT&T TR 62411 and Bellcore TRTSY- 000170.
- Detects line code violations, B8ZS / HDB3 line code signatures, loss of signal, and successive zeroes conditions.
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POWER
- Implemented in a low power 3.3 V tolerant 1.8/3.3 V CMOS technology.
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PACKAGE
- Available in a high density 276-pin L2BGA (27 mm x 27 mm) package.
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- Provides a -40C to +85C industrial temperature operating range.
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PM4329 HDLIU 32 Ball Map [50 KB] PMC-2032018 
PM4329 HDLIU IBIS Model [40 KB] PMC-2041633 
PM4329 HDLIU Rev B BSDL File [180 KB] PMC-2041134